clk24?
@@ -0,0 +1,26 @@
+diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi
+index 43c2530e2bb3..5c8bfd881554 100644
+--- a/arch/arm64/boot/dts/apple/t8103.dtsi
++++ b/arch/arm64/boot/dts/apple/t8103.dtsi
+@@ -364,7 +364,7 @@ spi3: spi@23510c000 {
+ reg = <0x2 0x3510c000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 617 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clk120>;
++ clocks = <&clk24>;
+ //cs-gpios = <&pinctrl_ap 49 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+diff --git a/drivers/spi/spi-apple.c b/drivers/spi/spi-apple.c
+index aed63d0317b4..9dc1d0219751 100644
+--- a/drivers/spi/spi-apple.c
++++ b/drivers/spi/spi-apple.c
+@@ -187,7 +188,7 @@ static bool apple_spi_prep_transfer(struct apple_spi *spi, struct spi_device *de
+ u32 cr;
+
+ /* Calculate and program the clock rate */
+- cr = DIV_ROUND_UP(clk_get_rate(spi->clk), t->speed_hz) - 1;
++ cr = DIV_ROUND_UP(clk_get_rate(spi->clk), t->speed_hz);
+ reg_write(spi, APPLE_SPI_CLKDIV, min_t(u32, cr, APPLE_SPI_CLKDIV_MAX));
+
+ /* Update bits per word */
\ No newline at end of file