pastefile1
@@ -0,0 +1,120 @@
+diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi
+index d12bce701750..7b0920487044 100644
+--- a/arch/arm64/boot/dts/apple/t8103.dtsi
++++ b/arch/arm64/boot/dts/apple/t8103.dtsi
+@@ -102,6 +102,13 @@ clkref: clock-ref {
+ clock-output-names = "clkref";
+ };
+
++ clk2: clock-2m {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <2000000>;
++ clock-output-names = "clk2";
++ };
++
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+@@ -148,6 +155,14 @@ pmgr0_ps: power-controller@23b700000 {
+
+ reg = <0x2 0x3b700000 0x0 0x14000>;
+
++ ps_gpio: power-controller@130 {
++ domain-output-names = "gpio";
++ compatible = "apple,t8103-pmgr-pstate", "apple,pmgr-pstate";
++ reg = <0x130>;
++ #power-domain-cells = <0>;
++ always-on;
++ };
++
+ ps_imx: power-controller@1b8 {
+ domain-output-names = "imx";
+ compatible = "apple,t8103-pmgr-pstate", "apple,pmgr-pstate";
+@@ -163,6 +178,15 @@ ps_sio: power-controller@1c0 {
+ #power-domain-cells = <0>;
+ };
+
++ ps_spi_p: power-controller@218 {
++ domain-output-names = "spi_p";
++ compatible = "apple,t8103-pmgr-pstate", "apple,pmgr-pstate";
++ reg = <0x218>;
++ #power-domain-cells = <0>;
++ power-domains = <&ps_sio>;
++ always-on;
++ };
++
+ ps_uart_p: power-controller@220 {
+ domain-output-names = "uart_p";
+ compatible = "apple,t8103-pmgr-pstate", "apple,pmgr-pstate";
+@@ -171,6 +195,15 @@ ps_uart_p: power-controller@220 {
+ power-domains = <&ps_sio>;
+ };
+
++ ps_spi3: power-controller@258 {
++ domain-output-names = "spi3";
++ compatible = "apple,t8103-pmgr-pstate", "apple,pmgr-pstate";
++ reg = <0x258>;
++ #power-domain-cells = <0>;
++ power-domains = <&ps_spi_p>;
++ always-on;
++ };
++
+ ps_uart0: power-controller@270 {
+ domain-output-names = "uart0";
+ compatible = "apple,t8103-pmgr-pstate", "apple,pmgr-pstate";
+@@ -226,19 +259,20 @@ ps_apcie_st: power-controller@418 {
+ power-domains = <&ps_ans2>, <&ps_apcie>;
+ };
+ };
+- pmgr1: clock-controller@23d280000 {
++
++ pmgr1_ps: power-controller@23d280000 {
+ compatible = "syscon", "simple-mfd";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <0x2 0x3d280000 0x0 0x4000>;
+
+- clk_nub_gpio: clock@80 {
+- clock-output-names = "nub_gpio";
+- compatible = "apple,t8103-clock-gate";
++ ps_nub_gpio: power-controller@80 {
++ domain-output-names = "nub_gpio";
++ compatible = "apple,t8103-pmgr-pstate", "apple,pmgr-pstate";
+ reg = <0x80>;
+- #clock-cells = <0>;
+- clocks = <&clk24>;
++ #power-domain-cells = <0>;
++ always-on;
+ };
+ };
+
+@@ -255,7 +289,7 @@ AIC_IRQ 194 IRQ_TYPE_LEVEL_HIGH
+ AIC_IRQ 195 IRQ_TYPE_LEVEL_HIGH
+ AIC_IRQ 196 IRQ_TYPE_LEVEL_HIGH>;
+
+- clocks = <&clk_gpio>;
++ power-domains = <&ps_gpio>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+@@ -278,7 +312,7 @@ AIC_IRQ 334 IRQ_TYPE_LEVEL_HIGH
+ AIC_IRQ 335 IRQ_TYPE_LEVEL_HIGH
+ AIC_IRQ 336 IRQ_TYPE_LEVEL_HIGH>;
+
+- clocks = <&clk_nub_gpio>;
++ power-domains = <&ps_nub_gpio>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+@@ -293,7 +327,8 @@ spi3: spi@23510c000 {
+ reg = <0x2 0x3510c000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 617 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clk_spi3>;
++ power-domains = <&ps_spi3>;
++ clocks = <&clk2>;
+ cs-gpios = <&gpio 49 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
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